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Preliminary
M61545AFP
Serial Data Control Dual Electronic Volume
REJ03F0162-0200 Rev.2.0 Dec 21, 2005
Description
The M61545AFP is a dual channel electronic volume controlled with 2-wire serial data. The built-in reference and power regulator circuitries allow operation of an electronic volume with less external parts. M61545AFP is able to cater for large supply voltage range of 4.5 to 15.0V.
Features
* Electronic volume * * * * * * 0 to -95dB/ 1-dB step, -dB 2-ch independent controllable electronic volume Low distortion THD = 0.002% typ. Vno = 5.0Vrms typ. (ATT = -, JIS-A network) Supply voltage range Single power supply: Vcc = 4.5 to 15V (regulated) Supply to both digital & analog circuitries Serial data interface 2-wire type Package 8 pin SOP/ 8 pin DIP Process 0.5 BIC-DMOS Reference circuit Built-in
Recommended Operating Condition
* Supply voltage range: Vcc = 4.5 to 15.0V
Pin Configuration
M61545AFP
VIN1
1
8 VIN2 7 VOUT2 6 VCC 5 CLOCK
VOUT1 2 GND DATA
Outline 8P2S-A(FP)
3 4
Rev.2.0 Dec 21, 2005 page 1 of 11
M61545AFP
Preliminary
IC Internal Block Diagram
VIN2 8 VOUT2 7 VCC 6 CLOCK 5
Vol
R2
Vol AMP2
Vol AMP1
Vol
R1
1 VIN1
Pin Description
Pin 1 2 3 4 5 6 7 8 Symbol VIN1 VOUT1 GND DATA CLOCK VCC VOUT2 VIN2 1-ch input pin 1-ch output pin Ground pin Control data input pin. Inputs data in synchronization with clock Clock input pin for transferring serial data Power supply pin. Stabilize the pin with decoupling capacitor 2-ch output pin 2-ch input pin Function
Absolute Maximum Ratings
Parameter Supply voltage Power dissipation Operating temperature Symbol Vcc, Vdd Pd Topr Ratings 16.0 385 -40 to +85
*1
Storage temperature Tstg -55 to +125 C Note: *1. These are the allowable values up to Ta = 31C mounting on 30% wiring density glass epoxy board. Derate by 7.14mW/C above that temperature.
Rev.2.0 Dec 21, 2005 page 2 of 11
+ + +
REF AMP
Vregulated
Logic Control
2 VOUT1
3 GND
4 DATA
Units V mW C
M61545AFP
Preliminary
Electrical Characteristics
(Vcc = 14.0V, Ta = 25C, unless stated otherwise)
Parameter Circuit current Maximum attenuation Attenuation error Maximum input voltage Maximum output voltage Output noise voltage Total harmonic distortion Channel separation Symbol ICC ATT ATT VIM VOM VNO1 VNO2 THD CS Min -- -2.0 -- 3.8 -- -- -- -- Limits Typ 8 -90 0 5.4 4.2 1.5 7.0 0.002 -80 Max 10 -80 2.0 -- -- 5.0 12.0 0.009 -70 Unit mA dB dB Vrms Vrms Vrms Vrms % dB ATT = - ATT = 0dB THD = 1%, ATT = -6dB THD = 1%, ATT = 0dB ATT = 0dB, Rg = 0, JIS-A ATT = -, Rg = 0, JIS-A F = 1kHz, Vo = 0.5Vrms, ATT = 0dB F = 1kHz, JIS-A, ATT = 0dB Test Conditions
Electrical Characteristics
(Vcc = 10.0V, Ta = 25C, unless stated otherwise)
Limits Parameter Circuit current Maximum attenuation Attenuation error Maximum input voltage Maximum output voltage Output noise voltage Total harmonic distortion Channel separation Symbol ICC ATT ATT VIM VOM VNO1 VNO2 THD CS -- -2.0 -- 2.4 -- -- -- -- Min Typ NA -90 0 4.0 2.9 1.5 6.0 0.002 -80 Max 10 -80 2.0 -- -- 5.0 12.0 0.009 -70 Unit mA dB dB Vrms Vrms Vrms Vrms % dB ATT = - ATT = 0dB THD = 1%, ATT = -6dB THD = 1%, ATT = 0dB ATT = 0dB, Rg = 0, JIS-A ATT = -, Rg = 0, JIS-A F = 1kHz, Vo = 0.5Vrms, ATT = 0dB F = 1kHz, JIS-A, ATT = 0dB Test Conditions
Electrical Characteristics
(Vcc = 7.0V, Ta = 25C, unless stated otherwise)
Limits Parameter Circuit current Maximum attenuation Attenuation error Maximum input voltage Maximum output voltage Output noise voltage Total harmonic distortion Channel separation Symbol ICC ATT ATT VIM VOM VNO1 VNO2 THD CS -- -2.0 -- 1.3 -- -- -- -- Min Typ NA -90 0 2.9 1.8 1.5 5.0 0.002 -80 Max 10 -80 2.0 -- -- 5.0 12.0 0.009 -70 Unit mA dB dB Vrms Vrms Vrms Vrms % dB ATT = - ATT = 0dB THD = 1%, ATT = -6dB THD = 1%, ATT = 0dB ATT = 0dB, Rg = 0, JIS-A ATT = -, Rg = 0, JIS-A F = 1kHz, Vo = 0.5Vrms, ATT = 0dB F = 1kHz, JIS-A, ATT = 0dB Test Conditions
Rev.2.0 Dec 21, 2005 page 3 of 11
M61545AFP
Preliminary
Electrical Characteristics
(Vcc = 5.0V, Ta = 25C, unless stated otherwise)
Parameter Circuit current Maximum attenuation Attenuation error Maximum input voltage Maximum output voltage Output noise voltage Total harmonic distortion Channel separation Symbol ICC ATT ATT VIM VOM VNO1 VNO2 THD CS Min -- -2.0 -- 0.5 -- -- -- -- Limits Typ NA -90 0 2.0 1.1 1.5 5.0 0.01 -80 Max 10 -80 2.0 -- -- 5.0 12.0 0.05 -70 Unit mA dB dB Vrms Vrms Vrms Vrms % dB ATT = - ATT = 0dB THD = 1%, ATT = -6dB THD = 1%, ATT = 0dB ATT = 0dB, Rg = 0, JIS-A ATT = -, Rg = 0, JIS-A F = 1kHz, Vo = 0.1Vrms, ATT = 0dB F = 1kHz, JIS-A, ATT = 0dB Test Conditions
DC Characteristics of Digital Block
Limits Parameter "L" level input voltage "H" level input voltage "L" level input current "H" level input current Symbol VIL VIH IIL IIH Min 0 2.2 -10 -- Typ -- -- -- -- Max 0.6 -- 10 10 Unit V V A A Test Conditions Data, clock pin VI = 0, VI = 5V, Data, clock pin
AC Characteristics of Digital Block
Parameter CLOCK cycle time CLOCK pulse width ("H" level) CLOCK pulse width ("L" level) CLOCK rise time CLOCK fall time DATA setup time DATA hold time Symbol tcr tWHC tWLC tr tf tSD tHD Min 4 1.6 1.6 -- -- 0.8 0.8 Limits Typ -- -- -- -- -- -- -- Max -- -- -- 0.4 0.4 -- -- sec Unit
Clock and Data Timings (Recommended Conditions)
tcr CLOCK tr tWHC DATA
75% 25%
tf tWLC
75%
tSD
tHD
Rev.2.0 Dec 21, 2005 page 4 of 11
M61545AFP
Preliminary
Relationship Between Data, Clock
Latch signal is "H".
DATA
D0
D1
D2
D3
D4
D5
D6
D7
D8
D9
D10
D11
D12
D13
D14
D15
D16
D17
DATA signal is read at rising edge of CLOCK. Latch signal is read at falling edge of CLOCK.
Data Format for "H" & "L"
CLOCK
DATA
DATA = "L"
DATA ="H"
CLOCK
For initialization, 2 blocks of identical 18-bit data need to be sent. The 2 blocks of data would set the operation condition for M61545AFP. This shown in figure below,
DATA
CLOCK
1 st Block of Data
0.2sec
time
2nd Block of Data
There should be a delay of 0.2 second before the first block of Clock and Data appear. The interval between the 1st Block of data and the 2nd Block should be 0.2 second as well. This sequence is to ensure proper operation of M61545AFP due to the wide dynamic voltage range, which M61545AFP is made to cater for. This format of initialization needs to be done once only during every powering up of M61545AFP. It recommends to use external mute switch together because it might generate the shock noise during this initial setup timing.
Rev.2.0 Dec 21, 2005 page 5 of 11
M61545AFP
Preliminary
Initialization Examples
Example 1: Setting supply of 9.0 to 12.0 V, and attenuation of - 20dB (please refer to page 7 for data format)
/CLOCK
/DATA
2.0m
st
2.8m
time (s)
3.6m
4.4m
1 Block data Delay of 0.2 second
Data format is A14BH
2 Block data
nd
Rev.2.0 Dec 21, 2005 page 6 of 11
M61545AFP
Preliminary
Example 2: Setting supply of 4.5V to 6.0V, and attenuation of -90dB (please refer to data format below)
/CLOCK
/DATA
2.7m
time (s)
3.4m
4.2m
1st Block data Delay of 0.2 second
Data format is D5A3H
2nd Block data
Data Input Format
D0 D1 D2 D3 D4 D5 D6 D7 D8 D9 D10 D11 D12 D13 D14 D15 D16 1 D17 1 Left Channel Right Channel DC Switch
DC Switch
Supply Voltage (V) 12.0 to15.0 9.0 to 12.0 6.0 to 9.0 4.5 to 6.0 D14 1 1 0 0 D15 1 0 1 0
Rev.2.0 Dec 21, 2005 page 7 of 11
M61545AFP
Preliminary
Volume Code
D0 ATT 0 -1 -2 -3 -4 -5 -6 -7 -8 -9 -10 -11 -12 -13 -14 -15 -16 -17 -18 -19 -20 -21 -22 -23 -24 -25 -26 -27 -28 -29 -30 -31 -32 -33 -34 -35 -36 -37 -38 -39 -40 -41 -42 -43 -44 -45 -46 -47 -48 -49 D7 L L L L L L L L L L L L L L L L L L L L L L L L L L L L L L L L L L L L L L L L L L L L L L L L L L D1 D8 L L L L L L L L L L L L L L L L L L L L L L L L L L L L L L L L H H H H H H H H H H H H H H H H H H D2 D9 L L L L L L L L L L L L L L L L H H H H H H H H H H H H H H H H L L L L L L L L L L L L L L L L H H D3 D10 L L L L L L L L H H H H H H H H L L L L L L L L H H H H H H H H L L L L L L L L H H H H H H H H L L D4 D11 L L L L H H H H L L L L H H H H L L L L H H H H L L L L H H H H L L L L H H H H L L L L H H H H L L D5 D12 L L H H L L H H L L H H L L H H L L H H L L H H L L H H L L H H L L H H L L H H L L H H L L H H L L D6 D13 L H L H L H L H L H L H L H L H L H L H L H L H L H L H L H L H L H L H L H L H L H L H L H L H L H Left Channel Right Channel
Rev.2.0 Dec 21, 2005 page 8 of 11
M61545AFP
D0 ATT -50 -51 -52 -53 -54 -55 -56 -57 -58 -59 -60 -61 -62 -63 -64 -65 -66 -67 -68 -69 -70 -71 -72 -73 -74 -75 -76 -77 -78 -79 -80 -81 -82 -83 -84 -85 -86 -87 -88 -89 -90 -91 -92 -93 -94 -95 - D7 L L L L L L L L L L L L L L H H H H H H H H H H H H H H H H H H H H H H H H H H H H H H H H H D1 D8 H H H H H H H H H H H H H H L L L L L L L L L L L L L L L L L L L L L L L L L L L L L L L L H D2 D9 H H H H H H H H H H H H H H L L L L L L L L L L L L L L L L H H H H H H H H H H H H H H H H H D3 D10 L L L L L L H H H H H H H H L L L L L L L L H H H H H H H H L L L L L L L L H H H H H H H H H D4 D11 L L H H H H L L L L H H H H L L L L H H H H L L L L H H H H L L L L H H H H L L L L H H H H H D5 D12 H H L L H H L L H H L L H H L L H H L L H H L L H H L L H H L L H H L L H H L L H H L L H H H D6 D13 L H L H L H L H L H L H L H L H L H L H L H L H L H L H L H L H L H L H L H L H L H L H L H H
Preliminary
Left Channel Right Channel
Rev.2.0 Dec 21, 2005 page 9 of 11
M61545AFP
Preliminary
Application Example
2.2F + VIN2 8 VOUT2 7 VCC 6 100F + CLOCK 5
Vol
R2
Vol AMP2
Vol AMP1
Vol
R1
1 VIN1 + 2.2F
Rev.2.0 Dec 21, 2005 page 10 of 11
+ + +
REF AMP
Vregulated
Logic Control
2 VOUT1
3 GND
4 DATA
Units: Resistance: Capacitance: F
M61545AFP
Preliminary
Package Dimensions
4.85 5.25 Max 5 8 4.4
Unit: mm
1
4 *0.22 0.05 0.20 0.04 2.03 Max 0.75 Max
0.25 6.50 + 0.15 -
1.05 0 - 8
0.10 0.10
1.27 *0.42 0.08 0.40 0.06
0.25 0.60 + 0.18 -
0.15 0.12 M
*Dimension including the plating thickness Base material dimension Package Code JEDEC JEITA Mass (reference value) FP-8D -- Conforms 0.10 g
Rev.2.0 Dec 21, 2005 page 11 of 11
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